Referring to FIG. 1, a block diagram of a conventional arrangement 10 for testing fusible cells is shown. Each fuse cell 12a–c is associated with a scan flip-flop 14a–c within a test scan chain 16. Multiplexers 18a–c are provided to present values of the respective fuse cells 12a–c into the respective flip-flops 14a–c. The fuse cell values are then read in serial fashion through the test scan chain 16 by clocking the flip-flops 14a–c with a clock signal (i.e., CLOCK).
In the past there have been problems with using laser-activated fuses using the conventional arrangement 10. One problem is that the fuse cells 12a–c alter a scan test methodology. Programming different values into the fuse cells 12a–c for different parts cause different captured outputs. Therefore, a custom set of scan test vectors must be created and maintained for each programming pattern of the fuse cells 12a–c. The multiple sets of test vectors reduce an efficiency of a test engineer as well as a tester itself. Furthermore, generation of the multiple vector sets adds complexity as compared to a single set. Alternatively, if the flip-flops 14a–c are not inserted onto the test scan chain 16, there has been no way to read or test the programmed fuse cells 12a–c. 
Another conventional technology is to use a read-only memory (ROM) cell to replace the functionality of the fuse cells 12a–c. However, the ROM cell approach does not allow for customization among parts based on a common design. Each unique ROM cell program requires a unique fabrication mask. The idea with the laser-activated fuses is that within one mask set, there could be different values in the fuse cells 12a–c. 